SoC Architect

About the role

We are partnering with an innovative semiconductor company developing next‑generation edge AI and imaging technologies. The SoC Lead Engineer / Architect will own the architecture and front‑end development of advanced low‑power, high‑performance System‑on‑Chip solutions for consumer devices.

Key responsibilities

• Lead SoC architecture and micro‑architecture development for complex digital systems
• Own front‑end design flow from specification through RTL implementation
• Drive low‑power design strategies and SoC power management
• Develop synthesizable RTL in Verilog/SystemVerilog
• Integrate internal and third‑party IP into complete SoC solutions
• Collaborate with verification and FPGA teams on debug and validation
• Support silicon bring‑up and system‑level debugging activities
• Work closely with backend/physical design teams to meet timing, area, and power targets
• Apply methodologies such as CDC, lint, formal verification, UPF, MBIST, and DFT
• Develop automation and workflow improvements using Python, Perl, or TCL

Required profile

• Degree in Electronics Engineering, Electrical Engineering, or a related discipline
• 12+ years of experience in SoC architecture and digital IC design
• Strong hands‑on RTL development experience
• Deep understanding of low‑power SoC methodologies and front‑end design flows
• Proven experience leading complex SoC/IP development programs
• Excellent debugging and cross‑functional collaboration skills

Required skills

• Verilog / SystemVerilog
• Python, Perl, TCL scripting
• Synopsys or Cadence IP integration tools
• Low‑power design methodologies (UPF, MBIST, DFT)
• Clock domain crossing (CDC), lint, formal verification
• Tape‑out experience in advanced nodes (TSMC 12nm or below, Samsung 8nm or below)
• SRAM integration knowledge
• Advanced packaging familiarity (WLCSP, FCCSP)